Four-Terminal FinFETs Fabricated Using an Etch-Back Gate Separation

Author

Endo, Kazuhiko ; Ishikawa, Yuki ; Liu, Yongxun ; Ishii, Kenichi ; Matsukawa, Takashi ; O´Uchi, Shin-Ichi ; Masahara, Meishoku ; Sugimata, Etsuro ; Tsukada, Jyunichi ; Yamauchi, Hiromi ; Suzuki, Eiichi

Author_Institution

Nat. Inst. of Adv. Ind. Sci. & Technol., Ibaraki

Volume

6

Issue

2

fYear

2007

fDate

3/1/2007 12:00:00 AM

Firstpage

201

Lastpage

205

Abstract

A novel resist etch-back process for fabrication of separated-gate four-terminal FinFETs has been investigates. This process enabled co-fabrication of three-terminal (3T) and four-terminal (4T) FinFETs on a same chip. The fabricated 3T-FinFET shows excellent sub-threshold characteristics and drain induced barrier lowering (DIBL) value whereas the 4T-FinFET provides efficient V_th controllability. The effective V_th controllability with keeping a small sub-threshold slope has been confirmed in the synchronized double gate (DD) operation mode

Keywords

MOSFET; etching; resists; DIBL value; drain induced barrier lowering value; four-terminal FinFETs fabrication; resist etch-back gate separation; three-terminal FinFETs fabrication; CMOS technology; Controllability; Energy consumption; Etching; Fabrication; FinFETs; MOSFET circuits; Resists; Threshold voltage; Ultra large scale integration; ${rm V}_{rm th}$ control; Etch-back; FinFET; four-terminal; gate-separation;

fLanguage

English

Journal_Title

Nanotechnology, IEEE Transactions on

Publisher

ieee

ISSN

1536-125X

Type

jour

DOI

10.1109/TNANO.2007.891830

Filename

4126507