Avalanche Breakdown Due to 3-D Effects in the Impact-Ionization MOS (I-MOS) on SOI: Reliability Issues

Author

Mayer, Frédéric ; Royer, Cyrille Le ; Blachier, Denis ; Clavelier, Laurent ; Deleonibus, Simon

Author_Institution

Lab. d´´Electron. et Technol. de I´´lnformation, CEA-LETI-MINATEC, Grenoble

Volume

55

Issue

6

fYear

2008

fDate

6/1/2008 12:00:00 AM

Firstpage

1373

Lastpage

1378

Abstract

In this paper, we report on reliability issues concerning the impact-ionization MOS (I-MOS). For the first time, the anomalously high off current in the planar I-MOS is studied owing to light-emission experiments. We show that a first breakdown occurs at the width borders of the device, followed by the theoretical volume breakdown. This result is intensively studied through 3D TCAD simulations. The results are correlated with electrical measurements. We finally propose and validate a degradation mechanism based on charge trapping.

Keywords

CAD; circuit reliability; impact ionisation; silicon-on-insulator; 3D TCAD simulations; 3D effects; SOI; Si; avalanche breakdown; impact-ionization MOS; light-emission experiments; planar I-MOS; reliability issues; Avalanche breakdown; Degradation; Electric breakdown; Electric variables measurement; Impact ionization; MOSFETs; P-i-n diodes; Semiconductor process modeling; Silicon on insulator technology; Temperature measurement; Impact ionization; impact-ionization MOS (I-MOS); influence of geometrical parameters; silicon-on-insulator (SOI); subthreshold slope; three dimensional;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2008.922797

Filename

4527065