DocumentCode
1229108
Title
A 1.5 V full-swing BiCMOS dynamic logic gate circuit suitable for VLSI using low-voltage BiCMOS technology
Author
Kuo, J.B. ; Su, K.W. ; Lou, J.H. ; Chen, S.S. ; Chiang, C.S.
Author_Institution
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Volume
30
Issue
1
fYear
1995
fDate
1/1/1995 12:00:00 AM
Firstpage
73
Lastpage
75
Abstract
This paper presents a 1.5 V full-swing BiCMOS dynamic logic gate circuit, based on a dynamic pull-down BiPMOS configuration, suitable for VLSI using low-voltage BiCMOS technology. With an output load of 0.2 pf, the 1.5 V full-swing BiCMOS dynamic logic gate circuit shows a more than 1.8 times improvement in speed as compared to the CMOS static one
Keywords
BiCMOS digital integrated circuits; BiCMOS logic circuits; VLSI; combinational circuits; logic gates; 0.2 pF; 1.5 V; BiCMOS dynamic logic gate; VLSI; circuit speed; dynamic pull-down BiPMOS configuration; full-swing BiCMOS; low-voltage BiCMOS technology; output load; BiCMOS integrated circuits; CMOS logic circuits; CMOS technology; Logic circuits; Logic gates; Paper technology; Power supplies; Switches; Very large scale integration; Voltage;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/4.350190
Filename
350190
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