DocumentCode :
1229158
Title :
A bootstrapped bipolar CMOS (B2CMOS) Gate for low-voltage applications
Author :
Embabi, Sherif H K ; Bellaouar, Abdellatif ; Islam, Kazi
Author_Institution :
Dept. of Electr. Eng., Texas A&M Univ., College Station, TX, USA
Volume :
30
Issue :
1
fYear :
1995
fDate :
1/1/1995 12:00:00 AM
Firstpage :
47
Lastpage :
53
Abstract :
This paper reports on a BiCMOS logic gate which combines bootstrapping and transient saturation techniques to achieve full swing operation down to 1.1 V supply voltage. The proposed B2CMOS uses a conventional (noncomplementary) BiCMOS process. HSPICE simulations have been used to compare the B2CMOS to CMOS, BiNMOS, and BS-BiCMOS for sub-0.5 μm BiCiMOS technologies. Simulation results have shown that the B2CMOS gate outperforms CMOS, BiNMOS, and BS-BiCMOS gates at 3 V and below. The crossover capacitance/fanout of the B2CMOS gate is 100 fF (i.e., fanout of 4) at 1.5 V. The delay-to-load sensitivity of the B2CMOS is 220 ps/pF (8 ps/fanout) which is one order of magnitude smaller than that of CMOS at 1.5 V
Keywords :
BiCMOS digital integrated circuits; BiCMOS logic circuits; SPICE; bootstrap circuits; circuit analysis computing; combinational circuits; digital simulation; integrated circuit design; logic gates; transient analysis; 0.5 micron; 1.1 to 1.5 V; 100 fF; B2CMOS; HSPICE simulations; bootstrapped bipolar CMOS gate; crossover capacitance/fanout; delay-to-load sensitivity; full swing operation; low-voltage applications; transient saturation techniques; BiCMOS integrated circuits; CMOS logic circuits; CMOS technology; Capacitance; Delay; Inverters; Logic gates; MOSFETs; Performance loss; Voltage;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.350195
Filename :
350195
Link To Document :
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