• DocumentCode
    1229974
  • Title

    Improving Performance of Dynamic Programming via Parallelism and Locality on Multicore Architectures

  • Author

    Tan, Guangming ; Sun, Ninghui ; Gao, Guang R.

  • Author_Institution
    Inst. of Comput. Technol., Chinese Acad. of Sci., Beijing
  • Volume
    20
  • Issue
    2
  • fYear
    2009
  • Firstpage
    261
  • Lastpage
    274
  • Abstract
    Dynamic programming (DP) is a popular technique which is used to solve combinatorial search and optimization problems. This paper focuses on one type of DP, which is called nonserial polyadic dynamic programming (NPDP). Owing to the nonuniform data dependencies of NPDP, it is difficult to exploit either parallelism or locality. Worse still, the emerging multi/many-core architectures with small on-chip memory make these issues more challenging. In this paper, we address the challenges of exploiting the fine grain parallelism and locality of NPDP on multicore architectures. We describe a latency-tolerant model and a percolation technique for programming on multicore architectures. On an algorithmic level, both parallelism and locality do benefit from a specific data dependence transformation of NPDP. Next, we propose a parallel pipelining algorithm by decomposing computation operators and percolating data through a memory hierarchy to create just-in-time locality. In order to predict the execution time, we formulate an analytical performance model of the parallel algorithm. The parallel pipelining algorithm achieves not only high scalability on the 160-core IBM Cyclops64, but portable performance as well, across the 8-core Sun Niagara and quad-cores Intel Clovertown.
  • Keywords
    dynamic programming; multiprocessing systems; parallel architectures; pipeline processing; 160-core IBM Cyclops64; 8-core Sun Niagara; combinatorial optimization problem; combinatorial search problem; dynamic programming; many-core architectures; multicore architectures; nonserial polyadic dynamic programming; parallel pipelining algorithm; quad-cores Intel Clovertown; Algorithm design and analysis; Analytical models; Computer architecture; Concurrent computing; Dynamic programming; Multicore processing; Parallel processing; Performance analysis; Pipeline processing; Predictive models; Application studies resulting in better multiple-processor systems; Dynamic programming; Memory management; Multi-core/single-chip multiprocessors; Performance measures; latency tolerant; memory hierarchy; multicore.; percolation;
  • fLanguage
    English
  • Journal_Title
    Parallel and Distributed Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1045-9219
  • Type

    jour

  • DOI
    10.1109/TPDS.2008.78
  • Filename
    4527239