Title :
Configurable multilayer CNN-UM emulator on FPGA
Author :
Nagy, Zoltán ; Szolgay, Péter
Author_Institution :
Dept. of Image Process. & Neurocomputing, Univ. of Veszprem, Hungary
fDate :
6/1/2003 12:00:00 AM
Abstract :
A new emulated digital multilayer cellular neural network (universal machine (CNN-UM) chip architecture called Falcon has been developed. In this brief, the main steps of the field-programmable gate array (FPGA) implementation are introduced. The main results are as follows. The CNN-UM architecture emulated on Xilinx Virtex series FPGA, three-dimensional nonlinear spatio-temporal dynamics can be implemented on this architecture. The critical parameters of the implementation in a single-layer configuration are 55 million cell update/s/processor core, or, equivalently 1 giga-operation per second (GOPS) computing performance. In the face of the high performance, the power requirements of the architecture are relatively low only ∼3 W per processor core. Using reconfigurable devices to implement emulated digital architectures provides more flexibility compared to the custom very large-scale integration designs because different Falcon architectures can be used on the same FPGA device.
Keywords :
cellular neural nets; field programmable gate arrays; neural net architecture; reconfigurable architectures; 3 W; Falcon architecture; Xilinx Virtex series FPGA; cellular neural network; configurable multilayer CNN-UM emulator; digital architecture; field programmable gate array; reconfigurable device; three-dimensional nonlinear spatio-temporal dynamics; universal machine; Analog computers; Cellular neural networks; Computer architecture; Equations; Field programmable gate arrays; Image processing; Large scale integration; Multi-layer neural network; Nonhomogeneous media; Signal processing;
Journal_Title :
Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on
DOI :
10.1109/TCSI.2003.812611