DocumentCode :
1230948
Title :
Reducing hardware with fuzzy multiple signature analysis
Author :
Wu, Yuejian ; Ivanov, André
Author_Institution :
Bell-Northern Res., Ottawa, Ont., Canada
Volume :
12
Issue :
1
fYear :
1995
Firstpage :
68
Lastpage :
74
Abstract :
Fuzzy multiple signature analysis seeks the middle ground between the complex implementation and high overhead of conventional multiple signature analysis and the less-desirable error detection rates of single signature analysis. This scheme relaxes the restriction of one-to-one reference-signature correspondence required by the conventional multiple signature scheme, yet retains significant fault coverage. It also avoids the high fault-grading CPU times of the single signature scheme
Keywords :
fuzzy logic; logic testing; signal processing; complex implementation; error detection rates; fuzzy multiple signature analysis; high fault-grading CPU times; high overhead; one-to-one reference-signature correspondence; Built-in self-test; Circuit analysis computing; Circuit faults; Circuit testing; Collision mitigation; Compaction; Computational modeling; Flexible manufacturing systems; Hardware; Tires;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/54.350697
Filename :
350697
Link To Document :
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