Automated synthesis of switched-capacitor ladder filters within an analogue silicon compilation environment

The use of commercial UK ECAD tools within an optimisation-based analogue `synthesis expert´ is presented for the design of switched-capacitor ladder filters. The experts form part of a novel analogue VLSI silicon compilation environment, which is described. SC ladder structures have a number of attractive features as candidate filtering modules within such a system, including low sensitivity and ready availability of prototype design data, but are subject to problems in practical implementation attributable to certain errors of approximation inherent in their realisation. Capacitance spread can become a major problem in dealing with these errors by conventional methods, and this is then a serious difficulty when integrated circuit realisation is attempted. The present design technique completely and effectively eliminates this problem and also allows the designer to compensate for the effect of the nonideal characteristics of practical MOS components, including finite gain and finite bandwidth in the operational amplifiers. The technique allows for the use of relatively low sampling frequencies and results in a low-sensitivity filter having an exact frequency response and featuring very low on-chip capacitance spread