DocumentCode :
1231097
Title :
A processor-time-minimal systolic array for transitive closure
Author :
Scheiman, Chris J. ; Cappello, Peter R.
Author_Institution :
Dept. of Comput. Sci., California Univ., Santa Barbara, CA, USA
Volume :
3
Issue :
3
fYear :
1992
fDate :
5/1/1992 12:00:00 AM
Firstpage :
257
Lastpage :
269
Abstract :
Using a directed acyclic graph (DAG) model of algorithms, the authors focus on processor-time-minimal multiprocessor schedules: time-minimal multiprocessor schedules that use as few processors as possible. The Kung, Lo, and Lewis (KLL) algorithm for computing the transitive closure of a relation over a set of n elements requires at least 5n-4 parallel steps. As originally reported. their systolic array comprises n2 processing elements. It is shown that any time-minimal multiprocessor schedule of the KLL algorithm´s dag needs at least n2/3 processing elements. Then a processor-time-minimal systolic array realizing the KLL dag is constructed. Its processing elements are organized as a cylindrically connected 2-D mesh, when n=0 mod 3. When n≠0 mod 3, the 2-D mesh is connected as a torus
Keywords :
parallel algorithms; systolic arrays; 2-D mesh; directed acyclic graph; multiprocessor schedule; processor-time-minimal multiprocessor schedules; systolic array; transitive closure; Algorithm design and analysis; Computational modeling; Computer science; Concurrent computing; Constraint optimization; Difference equations; Differential equations; Linearity; Processor scheduling; Systolic arrays;
fLanguage :
English
Journal_Title :
Parallel and Distributed Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1045-9219
Type :
jour
DOI :
10.1109/71.139200
Filename :
139200
Link To Document :
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