Sense Amplifier Pass Transistor Logic for energy efficient and DPA-resistant AES circuit

In this paper, we show that Sense Amplifier Pass Transistor Logic (SAPTL) is a promising choice for increasing Differential Power Analysis attack (DPA-attack) resistance while maintaining energy efficiency. Furthermore, we present an automatic approach to generate big SAPTL logic blocks (e.g. SBOX) from a synthesized verilog code. We have mounted differential power analysis attacks on the designed circuits and calculated the success rate over different noise conditions. Our results show that SAPTL consumes comparable amount of energy with respect to static CMOS while significantly improving resistance to power side channel attacks.