DocumentCode
123159
Title
Assessing uniqueness and reliability of SRAM-based Physical Unclonable Functions from silicon measurements in 45-nm bulk CMOS
Author
Fujiwara, H. ; Yabuuchi, M. ; Nii, Koji
Author_Institution
Renesas Electron. Corp., Kodaira, Japan
fYear
2014
fDate
3-5 March 2014
Firstpage
523
Lastpage
528
Abstract
Assessments of the uniqueness and reliability for SRAM-based Physical Unclonable Functions (PUFs) embedded in dies were conducted using silicon measurements. To generate an intrinsic identification (ID) for each die, embedded SRAM PUFs of three types were implemented using 45-nm bulk CMOS technology: 1) single power-on scheme, 2) divided-power-on scheme, and 3) low/low writing scheme. Measured Hamming distances of IDs between 64 dies showed no significant advantage or disadvantage in three SRAM-based PUFs in terms of uniqueness, being acceptable for practical use. The measured error rates of IDs in iteration, supply voltage variation, and temperature variation show that the divided-power-on scheme has better reliability than the other schemes.
Keywords
CMOS memory circuits; SRAM chips; elemental semiconductors; integrated circuit reliability; silicon; Hamming distances; SRAM-based physical unclonable function reliability; bulk CMOS technology; dies; divided-power-on scheme; embedded SRAM PUF; error rates; intrinsic identification; iteration; low-low-writing scheme; silicon measurements; single-power-on scheme; size 45 nm; supply voltage variation; temperature variation; Hamming distance; High definition video; Random access memory; Semiconductor device measurement; Temperature measurement; Voltage measurement; Writing; PUF; Physical unclonable function; Reliability; SRAM; Uniqueness;
fLanguage
English
Publisher
ieee
Conference_Titel
Quality Electronic Design (ISQED), 2014 15th International Symposium on
Conference_Location
Santa Clara, CA
Print_ISBN
978-1-4799-3945-9
Type
conf
DOI
10.1109/ISQED.2014.6783371
Filename
6783371
Link To Document