Title :
Formal verification of safety of polymorphic heterogeneous multi-core architectures
Author :
Velev, Miroslav N. ; Ping Gao
Abstract :
We study the efficient formal verification of polymorphic heterogeneous multi-core architectures, such as Bahurupi, and also present insights on how to design such architectures at a high level of abstraction in order to facilitates their formal verification. To the best of our knowledge, this is the first work on formal verification of such architectures.
Keywords :
abstracting; formal verification; multiprocessing systems; safety; Bahurupi; abstraction level; polymorphic heterogeneous multicore architecture; safety formal verification; Abstracts; Clocks; Computer architecture; Formal verification; Mathematical model; Registers; Safety; Bahurupi; Correspondence Checking; Logic of Equality with Unin-terpreted Functions and Memories (EUFM); Polymorphic Heterogeneous Multi-Core Architectures; Positive Equality; SAT; SMT; abstraction; decision procedures; formal verification; pipelined processors;
Conference_Titel :
Quality Electronic Design (ISQED), 2014 15th International Symposium on
Conference_Location :
Santa Clara, CA
Print_ISBN :
978-1-4799-3945-9
DOI :
10.1109/ISQED.2014.6783383
