DocumentCode :
1232171
Title :
Device performance of shallow junction PMOSFETs fabricated using low-energy ion implantation of B and BF2 into crystalline and Ge preamorphised silicon
Author :
Hong, S.N. ; Ruggles, G.A. ; Paulos, J.J. ; Wortman, J.J. ; Russell, P.E.
Author_Institution :
Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
Volume :
25
Issue :
16
fYear :
1989
Firstpage :
1100
Lastpage :
1101
Abstract :
P-channel MOSFETs with source/drain junction depths less than 0.1 mu m were fabricated using 1.35 keV B+ and 6 keV BF2+ implantation into crystalline and Ge preamorphised silicon. For 950-1050 degrees C, 10 s rapid thermal annealing, the various implantation conditions yielded similar device characteristics. The implantation of BF2+ resulted in a slight increase in the specific contact resistivity to source and drain over that obtained using B+. Measurements of subthreshold I/V characteristics and the channel length dependence of threshold voltage indicated that good long-channel behaviour was obtained for 0.7 mu m channel length devices.
Keywords :
boron; boron compounds; insulated gate field effect transistors; ion implantation; silicon; 1.35 keV; 10 s; 100 nm; 6 keV; 700 nm; 950 to 1050 C; PMOSFETs; RTA; Si:B; Si:BF 2; channel length dependence; contact resistivity; crystalline Si; device characteristics; device performance; implantation conditions; long-channel behaviour; low-energy ion implantation; p-channel; preamorphised Si; rapid thermal annealing; shallow junction; submicron devices; subthreshold I/V characteristics; threshold voltage;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19890736
Filename :
35132
Link To Document :
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