Analysis of the System Level Design of a 1.5 Bit/Stage Pipeline ADC

In this paper a comparison of analog versus digital information is given, where the superior noise resilience of digital signals is shown to necessitate digital signalling for modern high-speed signaling environments. Non-idealities that are analog in nature are shown to necessitate ADCs in the digital signal path, which allow for signal recovery in the digital domain. A brief discussion of the Flash ADC is given, followed by a detailed analysis of the system level design of a 1.5 bit/stage pipeline ADC.