Title :
Timing circuits for RSFQ digital systems
Author :
Jao-Ching Lin ; Semenov, V.K.
Author_Institution :
Dept. of Electr. Eng., State Univ. of New York, Stony Brook, NY, USA
Abstract :
A low-skew frequency divider and clock controller have been designed for high-frequency timing of superconductor rapid single-flux-quantum (RSFQ) digital systems. The circuits have only about 10-ps skew between input and output signals and are applicable for multirate digital systems (e,g., oversampling analog-to-digital converter and bit-serial digital systems). Several circuits have been fabricated in conventional Nb-trilayer technology with a critical current density of 1 kA/cm/sup 2/. The most complex clock controller generates trains of 2/sup 24/ single-flux-quantum pulses with a period of less than 70 ps. The long-term relative stability of these intervals has been measured to be better than 6/spl times/10/sup -5/. The basic component of the controller, a frequency divider, operates at input frequencies above 85 GHz.<>
Keywords :
analogue-digital conversion; circuit stability; clocks; frequency dividers; integrated circuit testing; superconducting device testing; superconducting logic circuits; timing circuits; 70 ps; 85 GHz; Nb; Nb-trilayer technology; RSFQ digital systems; bit-serial digital systems; clock controller; critical current density; high frequency testing; high-frequency timing; long-term relative stability; low frequency testing; low-skew frequency divider; multirate digital systems; oversampling analog-to-digital converter; single-flux-quantum pulse train generation; superconductor rapid single-flux-quantum digital systems; timing circuits; Analog-digital conversion; Circuits; Clocks; Control systems; Critical current density; Digital systems; Frequency conversion; Pulse generation; Stability; Timing;
Journal_Title :
Applied Superconductivity, IEEE Transactions on
