• DocumentCode
    1232948
  • Title

    Study of the step coverage and contact resistance by using two-step TiN barrier and evolve simulation

  • Author

    Sidhwa, Ardeshir ; Spinner, Chuck ; Gandy, Todd ; Goulding, Mike ; Brown, William ; Naseem, Hameed ; Ulrich, Richard ; Ang, Simon ; Charlton, Sherwood ; Prasad, Vinay ; Cale, Timothy

  • Author_Institution
    STMicroelectron. Inc., Phoenix, AZ, USA
  • Volume
    18
  • Issue
    1
  • fYear
    2005
  • Firstpage
    163
  • Lastpage
    173
  • Abstract
    Device aspect ratios and dimensions at the contact and via levels for old and new technologies are driving PVD/WCVD-based metallization to its full limit at integrated circuits (ICs) fabrication sites (Wilson et al., 1993). Contact and via This work describes the work performed at ST Microelectronics regarding the TiN barrier film properties with respect to process variables. Single-step and dual-step TiN barrier processes were studied for contact and via step coverage profiles used for aluminum and tungsten plug technologies. Electrical contact resistance values were evaluated using single and dual step TiN barrier processes. EVOLVE, a topography simulation program was used to study the step coverages and deposited film profiles for single and dual steps TiN barrier processes. In this work we prove that dual step TiN barrier process is superior to single step TiN barrier process in terms of step coverage, current leakage, film stress and contact resistance values.
  • Keywords
    aluminium; chemical vapour deposition; contact resistance; digital simulation; integrated circuit interconnections; integrated circuit metallisation; internal stresses; leakage currents; metallic thin films; surface topography; titanium compounds; tungsten; Al; PVD metallisation; PVD sputtering; TiN; TiN barrier film properties; W; barrier quality; current leakage; device aspect ratio; diffusion; dual step TiN barrier process; electrical contact resistance; evolve simulation; film stress; integrated circuits fabrication; process variables; single step TiN barrier process; step coverage; titanium nitride films; topography simulation program; tungsten chemical vapour deposition based metallisation; tungsten plug technology; volcanoes; wormholes; Aluminum; Atherosclerosis; Circuit simulation; Contact resistance; Fabrication; Integrated circuit metallization; Integrated circuit technology; Microelectronics; Tin; Tungsten;
  • fLanguage
    English
  • Journal_Title
    Semiconductor Manufacturing, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0894-6507
  • Type

    jour

  • DOI
    10.1109/TSM.2004.840524
  • Filename
    1393056