Title :
High-performance direct digital frequency synthesizers using piecewise-polynomial approximation
Author :
De Caro, Davide ; Strollo, Antonio G M
Author_Institution :
Dept. of Electron. & Telecommun. Eng., Univ. of Naples, Italy
Abstract :
This paper presents new techniques to implement direct digital frequency synthesizers (DDFSs) with optimized piecewise-polynomial approximation. DDFS performances with piecewise-polynomial approximation are first analyzed, providing theoretical upperbounds for the spurious-free dynamic range (SFDR), the maximum absolute error, and the signal-to-noise ratio. A novel approach to evaluate, with reduced computational effort, the near optimal fixed-point coefficients which maximize the SFDR is described. Several piecewise-linear and quadratic DDFS are implemented in the paper by using novel, single-summation-tree architectures. The tradeoff between ROM and arithmetic circuits complexity is discussed, pointing out that a sensible silicon area reduction can be achieved by increasing ROM size and reducing arithmetic circuitry. The use of fixed-width arithmetic can be combined with the single-summation-tree approach to further increase performances. It is shown that piecewise-quadratic DDFSs become effective against piecewise-linear designs for an SFDR higher than 100 dBc. Third-order DDFSs are expected to give advantages for an SFDR higher than 180 dBc. The DDFS circuits proposed in this paper compare favorably with previously proposed approaches.
Keywords :
CMOS digital integrated circuits; direct digital synthesis; polynomial approximation; CMOS digital integrated circuits; arithmetic circuits complexity; direct digital frequency synthesizers; fixed width arithmetic; frequency synthesis; maximum absolute error; optimal fixed point coefficients; phase to sinusoid amplitude conversion; piecewise polynomial approximation; signal to noise ratio; silicon area reduction; single summation tree architectures; spurious free dynamic range; Arithmetic; Circuits; Computer architecture; Dynamic range; Frequency synthesizers; Performance analysis; Piecewise linear techniques; Read only memory; Signal analysis; Signal to noise ratio; CMOS digital integrated circuits; Direct digital frequency synthesis (DDFS); direct digital synthesis (DDS); frequency synthesis; interpolation; phase-to-sinusoid amplitude conversion;
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
DOI :
10.1109/TCSI.2004.841592