Title :
Burst Synchronization of Phase-Locked Loops
Author_Institution :
RCA David Sarnoff Research Center, Princeton, NJ, USA
fDate :
10/1/1973 12:00:00 AM
Abstract :
Locking a phase-locked loop (PLL) with a sinusoid that is 100-percent AM modulated by a low-duty cycle square wave (i.e., comes in bursts) is an old and well-known technique. Despite this, certain aspects of the technique have not been systematically considered. One of the most important aspects is how to avoid sidelockan undesired mode where the loop locks to a frequency other than the sinusoid´s frequency. In this paper, we explain how sidelock arises, how it can be avoided and how to provide a good lock while still avoiding sidelock. Throughout the paper our emphasis is on the situation, that is usually not considered, where the sinusoid´s frequency can be considerably different than the center frequency of the voltagecontrolled oscillator (VCO).
Keywords :
PLLs; Phase-locked loop (PLL); Error analysis; Error probability; Frequency; Gaussian noise; Interchannel interference; Laboratories; Phase locked loops; Phase shift keying; Springs; Voltage-controlled oscillators;
Journal_Title :
Communications, IEEE Transactions on
DOI :
10.1109/TCOM.1973.1091556