Title :
Fully-depleted SOI devices with TaSiN gate, HfO2 gate dielectric, and elevated source/drain extensions
Author :
Vandooren, A. ; Barr, A. ; Mathew, L. ; White, T.R. ; Egley, S. ; Pham, D. ; Zavala, M. ; Samavedam, S. ; Schaeffer, J. ; Conner, J. ; Nguyen, B.Y. ; White, Bruce E., Jr. ; Orlowski, Marius K. ; Mogab, J.
Author_Institution :
Motorola Inc., Austin, TX, USA
fDate :
5/1/2003 12:00:00 AM
Abstract :
We report for the first time the performance of ultrathin film fully-depleted (FD) silicon-on-insulator (SOI) CMOS transistors using HfO/sub 2/ gate dielectric and TaSiN gate material. The transistors feature 100-150 /spl Aring/ silicon film thickness and selective epitaxial silicon growth in the source/drain extension regions. TaSiN-gate shows good threshold voltage control using an undoped channel, which reduces threshold voltage variation with silicon film thickness and discrete, random dopant placement. Device processing for CMOS fabrication is drastically simplified by the use of the same gate material for both n- and p-MOSFETs. Electrical characterization results illustrate the combined impact of using high-k dielectric and metal gate on the performance of ultrathin film FD SOI devices.
Keywords :
CMOS integrated circuits; MOSFET; dielectric thin films; hafnium compounds; integrated circuit metallisation; silicon-on-insulator; tantalum compounds; 100 to 150 A; CMOS fabrication; CMOS transistors; CMOSFETs; HfO/sub 2/; HfO/sub 2/ gate dielectric; Si; TaSiN; TaSiN gate material; electrical characterization; elevated source/drain extensions; fully-depleted SOI devices; high-k dielectric; n-MOSFETs; p-MOSFETs; selective epitaxial Si growth; threshold voltage control; ultrathin film FD SOI devices; undoped channel; CMOS process; Dielectric materials; Fabrication; Hafnium oxide; High K dielectric materials; Semiconductor films; Silicon on insulator technology; Thickness control; Threshold voltage; Voltage control;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2003.812525
