Numerical algorithm for noise analysis of switched-capacitor networks

An algorithm for computerized noise analysis of switched-capacitor networks is presented. The analysis is entirely performed in the frequency domain and the passage from the continuous-time domain to the discrete-time domain is accomplished through numerical integration. The algorithm offers the capability of analyzing circuits incorporating correlated double-sampling or more generally multiple sampling. Numerical calculations consist of standard linear noise analysis and post-processing of the data to account for sample-and-hold and tracking effects. The assumptions fundamental to the analysis are fast and complete charge transfer and also stationarity or cyclostationarity of continuous-time noise sources. Numerical results for stray-insensitive and correlated double-sampling integrators are provided to illustrate the algorithm performance.