Enhancing the fault diagnosis of linear analog circuit steady-state DC testing through the analysis of equivalent faults

Presented is a study of fault equivalence in steady-state DC linear analog circuits. Equivalent fault relationships attributable to node isolation or equivalence in the driving-point and/or transfer characteristics of one-port network are shown to prevent effective fault diagnosis in a number of basic analog circuits. The analysis of these conditions using graph and transformation theorems is demonstrated to provide the basis for a more systematic approach to improving fault diagnosis.