• DocumentCode
    1234793
  • Title

    A comparison of three multipliers based on the Vgs2 technique for low-voltage applications

  • Author

    Maundy, Brent ; Maini, Mona

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of Calgary, Alta., Canada
  • Volume
    50
  • Issue
    7
  • fYear
    2003
  • fDate
    7/1/2003 12:00:00 AM
  • Firstpage
    937
  • Lastpage
    940
  • Abstract
    Multipliers are one of the most important building blocks in analog circuits. In this work, three new low-voltage topologies used to implement four-quadrant multipliers based on the Vgs2 technique are presented and compared. The operation and requirements for the multipliers are described. Theoretical results are verified with HSPICE simulations using a 3.3-V, 0.35-μm CMOS process.
  • Keywords
    CMOS analogue integrated circuits; analogue multipliers; network analysis; network topology; 0.35 micron; 3.3 V; CMOS process; LV topologies; analog multipliers; four-quadrant multipliers; low-voltage topologies; Adaptive filters; Adders; Analog circuits; CMOS process; Circuit simulation; Circuit topology; Equations; Information resources; Low voltage; Rails;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1057-7122
  • Type

    jour

  • DOI
    10.1109/TCSI.2003.813970
  • Filename
    1211094
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1234793