DocumentCode
1235775
Title
Time-space test response compaction and diagnosis based on BCH codes
Author
Wang, F.-M. ; Wang, W.-C. ; Li, J.C.-M.
Author_Institution
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei
Volume
3
Issue
3
fYear
2009
fDate
5/1/2009 12:00:00 AM
Firstpage
304
Lastpage
313
Abstract
A test response compaction and diagnosis technique based on BCH error correction code is presented. Traditional time-domain BCH compaction is not very useful in practice because the area overhead is too large. On the other hand, space-domain BCH compaction does not have a sufficient compression ratio to support a multiple error diagnosis. The proposed time-space compaction technique shares the polynomials among scan chains to reduce the area overhead A Boolean satisfiability optimiser is employed to diagnose the minimum number of errors. In addition, an analytical model is proposed to estimate the aliasing probability, which helps to determine key parameters of the proposed compactor. To diagnose ten errors in a design of 500 k flip-flops, the compression ratio is more than 2600 and the area overhead is <5 of flip-flops.
Keywords
BCH codes; Boolean functions; error correction codes; fault diagnosis; flip-flops; polynomials; BCH error correction code; Boolean satisfiability optimiser; aliasing probability; compression ratio; flip-flops; multiple error diagnosis; polynomials; time-space test response compaction; time-space test response diagnosis;
fLanguage
English
Journal_Title
Computers & Digital Techniques, IET
Publisher
iet
ISSN
1751-8601
Type
jour
DOI
10.1049/iet-cdt.2008.0066
Filename
4814320
Link To Document