Design issues for interconnects in densely packaged RSFQ structures

Author

Dimov, Boyko ; Ortlepp, Thomas ; Toepfer, Hannes ; Uhlmann, Hermann F.

Author_Institution

Dept. of Fundamentals & Theor. of Electr. Eng., Univ. of Technol. Ilmenau, Germany

Volume

13

Issue

2

fYear

2003

fDate

6/1/2003 12:00:00 AM

Firstpage

498

Lastpage

501

Abstract

The manufacturing process of LTS RSFQ circuits is quite similar to that of the semiconductor chips, thus providing the possibility of an ultra high-density packaging similar to the modern semiconductor logic circuits. However, the miniaturization of the interconnects does not enhance their performance. The present work highlights the impact of the parasitic interactions between the superconductive interconnects on the correct logical functionality and the upper bias current margins of the LTS RSFQ circuits.

Keywords

integrated circuit interconnections; integrated circuit packaging; superconducting logic circuits; LTS RSFQ circuits; densely packaged RSFQ structures; interconnects; logical functionality; parasitic interactions; superconductive interconnects; ultra high-density packaging; upper bias current margins; Electronics industry; Geometry; Integrated circuit interconnections; Logic circuits; Manufacturing processes; Microstrip; Semiconductor device packaging; Superconducting logic circuits; Superconductivity; Transmission line matrix methods;

fLanguage

English

Journal_Title

Applied Superconductivity, IEEE Transactions on

Publisher

ieee

ISSN

1051-8223

Type

jour

DOI

10.1109/TASC.2003.813916

Filename

1211649