Improved design for parallel multiplier based on phase-mode logic

For the improvement of the phase-mode parallel multiplier, we propose to use a Booth encoder as a substitute of an AND array. Booth´s algorithm is often used for the generation of partial products. The scale of the encoder does not matter for defining its operation frequency because the phase-mode Booth encoder is a pipelined structure. We suggest that the encoder is used as a serial encoder to reduce the number of Josephson junctions (JJ). There are two methods for applying the Booth encoder to the current structure. The first method is shifting multiplicands. The second method is shifting partial products and complementary signals. The total JJ´s in both methods are less than the AND array in large scale. The phase-mode Booth encoder with 2.5 kA/cm² Nb/AlO_x/Nb junctions can operate over 30 GHz according to the numerical simulations.