DocumentCode :
1237918
Title :
Panel Summaries
Volume :
22
Issue :
6
fYear :
2005
Firstpage :
598
Lastpage :
599
Abstract :
An evening panel session entitled "Microelectronics and Test in \´The New Europe\´--Challenges and Opportunities in Research and Industry," took place on 23 May at the 10th European Test Symposium (ETS 05). Raimund Ubar and Hans-Joachim Wunderlich (University of Stuttgart) organized the panel session, and Erik Jan Marinissen (Philips Research) served as moderator. Panelists included representatives of the Eastern European countries that have recently joined the EU, those who live and work outside the EU, and Western companies with branches or subcontractors in Eastern European countries.A panel session at the 3rd IEEE Infrastructure IP (IIP) Workshop held in conjunction with the VLSI Test Symposium focused on the question, "Is silicon debug the Cinderella of infrastructure IP?" IEEE Design & Test coorganized the panel session, and R. Chandramouli of Virage Logic served as chair.
Keywords :
IEEE European Test Symposium; IEEE Infrastructure IP Workshop; infrastructure IP; microelectronics; silicon debug; IEEE European Test Symposium; IEEE Infrastructure IP Workshop; infrastructure IP; microelectronics; silicon debug;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/MDT.2005.148
Filename :
1541926
Link To Document :
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