DocumentCode
1238873
Title
Average performance of parallel concatenated block codes
Author
Benedetto, S. ; Montorsi, G.
Author_Institution
Dipartimento di Elettronica Politecnico, Torino, Italy
Volume
31
Issue
3
fYear
1995
fDate
2/2/1995 12:00:00 AM
Firstpage
156
Lastpage
158
Abstract
A parallel concatenated coding scheme consists of two simple systematic constituent encoders linked by an interleaver. The input bits to the first encoder are scrambled by the interleaver before entering the second encoder. The codeword of the parallel concatenated code consists of the input bits followed by the parity check bits of both encoders. We propose for the first time an analytical solution to the problem of bounding the performance of parallel concatenated block codes, showing the influence of the interleaver length on the parallel code performance
Keywords
block codes; concatenated codes; average performance; input bits; interleaver length; parallel concatenated block codes; parallel concatenated coding scheme; parity check bits; performance bounding; systematic constituent encoders;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19950101
Filename
362593
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