FPGA Trojan Detection Using Length-Optimized Ring Oscillators

Author

Kitsos, Paris ; Voyiatzis, Artemios G.

Author_Institution

Comput. & Inf. Eng. Dept., Technol. Educ. Inst. of Western Greece, Athena, Greece

fYear

2014

fDate

27-29 Aug. 2014

Firstpage

675

Lastpage

678

Abstract

Hardware Trojan horses are a realistic threat for both ASIC and FPGA systems. Ring Oscillators (ROs) can be used to detect the presence of malicious hardware functionality. The length of an RO is a significant parameter for detecting efficiently malicious logic (sensitivity) while maintaining a low space and power profile. We explore through simulation the effect of the RO length on detecting different classes of Trojan horses on an FPGA.

Keywords

application specific integrated circuits; circuit optimisation; field programmable gate arrays; invasive software; logic design; oscillators; ASIC; FPGA Trojan detection; FPGA systems; RO length; field programmable gate arrays; hardware Trojan horses; length-optimized ring oscillators; malicious hardware functionality; malicious logic; power profile; Ciphers; Conferences; Field programmable gate arrays; Hardware; Ring oscillators; Table lookup; Trojan horses; FPGA; Trojan detection; hardware Trojan horse; ring oscillators; security;

fLanguage

English

Publisher

ieee

Conference_Titel

Digital System Design (DSD), 2014 17th Euromicro Conference on

Conference_Location

Verona

Type

conf

DOI

10.1109/DSD.2014.74

Filename

6927311

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=123976