DocumentCode
1239862
Title
A Parallel Deadlock Detection Algorithm with O(1) Overall Run-time Complexity
Author
Lee, Jaehwan John ; Xiao, Xiang
Author_Institution
ECE Dept., Indiana Univ.-Purdue Univ., Indianapolis, IN
Volume
7
Issue
2
fYear
2008
Firstpage
45
Lastpage
48
Abstract
This article proposes a novel parallel, hardware-oriented deadlock detection algorithm for multiprocessor system-on-chips. The proposed algorithm takes full advantage of hardware parallelism in computation and maintains information needed by deadlock detection through classifying all resource allocation events and performing class specific operations, which together make the overall run-time complexity of the new method O(1). We implement the proposed algorithm in Verilog HDL and demonstrate in the simulation that each algorithm invocation takes at most four clock cycles in hardware.
Keywords
hardware description languages; multiprocessing systems; operating systems (computers); resource allocation; system-on-chip; Verilog HDL; clock cycle; hardware-oriented deadlock detection; multiprocessor system-on-chips; parallel deadlock detection; resource allocation; run-time complexity; Algorithms implemented in hardware; Deadlocks; Real-time and embedded systems;
fLanguage
English
Journal_Title
Computer Architecture Letters
Publisher
ieee
ISSN
1556-6056
Type
jour
DOI
10.1109/L-CA.2008.4
Filename
4537165
Link To Document