DocumentCode :
124054
Title :
Trade-offs and progressive adoption of FPGA acceleration in network traffic monitoring
Author :
Kekely, Lukas ; Pus, Viktor ; Benacek, Pavel ; Korenek, Jan
Author_Institution :
CESNET a. l. e., Prague, Czech Republic
fYear :
2014
fDate :
2-4 Sept. 2014
Firstpage :
1
Lastpage :
4
Abstract :
Current hardware acceleration cores for network traffic processing are often well optimized for one particular task and therefore provide high level of hardware acceleration. But for many applications, such as network traffic monitoring and security, it is also necessary to achieve rapid development cycle to provide fast response to security threats.We propose and evaluate a new concept of hardware acceleration for flexible flow-based network traffic monitoring with support of application protocol analysis. The concept is called Software Defined Monitoring (SDM) and it relies on a configurable hardware accelerator implemented in FPGA, coupled with smart monitoring tasks running as software on general CPU. The monitoring tasks in the software control the level of detail and type of information retained during the hardware processing. This arrangement allows rapid application prototyping in the software, followed by further shifting of the timing critical parts of the processing to the hardware accelerator. The concept is proposed with the scalability in mind, therefore it is suitable for different FPGA based platforms ranging from embedded single-chip solutions (such as Zynq or CycloneV) to high-speed backbone network monitoring boxes. Our pilot high-speed implementation using FPGA acceleration board in a commodity server performs a 100Gb/s flow traffic measurement augmented by a selected application protocol analysis.
Keywords :
computer network management; computer network security; field programmable gate arrays; FPGA acceleration; FPGA based platform; SDM concept; application protocol analysis; commodity server; embedded single-chip solutions; field programmable gate array; flexible flow-based network traffic monitoring; hardware acceleration; hardware accelerator; high-speed backbone network monitoring box; network traffic processing; network traffic security; security threats; software defined monitoring; Acceleration; Field programmable gate arrays; Hardware; Monitoring; Protocols; Security; Software;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field Programmable Logic and Applications (FPL), 2014 24th International Conference on
Conference_Location :
Munich
Type :
conf
DOI :
10.1109/FPL.2014.6927443
Filename :
6927443
Link To Document :
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