• DocumentCode
    1240583
  • Title

    A novel SVM strategy for VSI dead-time-effect reduction

  • Author

    Attaianese, Ciro ; Nardi, Vito ; Tomasso, Giuseppe

  • Author_Institution
    Dept. of Autom., Electromagnetism, Comput. Sci. & Ind. Math., Univ. of Cassino, Italy
  • Volume
    41
  • Issue
    6
  • fYear
    2005
  • Firstpage
    1667
  • Lastpage
    1674
  • Abstract
    A novel high-efficiency space vector modulation (SVM) strategy is proposed in this paper. It is based on the simultaneous and combined use of two strategies. The former consists of commutating only one switch of each inverter leg within each modulation period. In this way, there is no need to impose the dead time. The latter performs a step-by-step change of the modulation frequency in order to reduce the distortion of the inverter output voltage. The proposed system has been implemented and carried out on a programmable logic device (PLD) digital board. For validation, an experiment has been set up and several tests have been performed. The results have been compared with the ones achieved by means of the traditional SVM technique.
  • Keywords
    commutation; frequency modulation; invertors; programmable logic devices; SVM strategy; VSI dead-time-effect reduction; programmable logic device digital board; single switch commutation; space vector modulation; variable frequency modulation; voltage-source inverter; Associate members; Commutation; Frequency modulation; Inverters; Leg; Performance evaluation; Support vector machines; Switches; Testing; Voltage; Dead time; frequency modulation; space-vector modulation; voltage-source inverter;
  • fLanguage
    English
  • Journal_Title
    Industry Applications, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0093-9994
  • Type

    jour

  • DOI
    10.1109/TIA.2005.857472
  • Filename
    1542321