• DocumentCode
    124112
  • Title

    Automated framework for FPGA-based parallel genetic algorithms

  • Author

    Liucheng Guo ; Thomas, David B. ; Ce Guo ; Luk, Wayne

  • Author_Institution
    Dept. of EEE, Imperial Coll. London, London, UK
  • fYear
    2014
  • fDate
    2-4 Sept. 2014
  • Firstpage
    1
  • Lastpage
    7
  • Abstract
    Parallel genetic algorithms (pGAs) are a variant of genetic algorithms which can promise substantial gains in both efficiency of execution and quality of results. pGAs have attracted researchers to implement them in FPGAs, but the implementation always needs large human effort. To simplify the implementation process and make the hardware pGA designs accessible to potential non-expert users, this paper proposes a general-purpose framework, which takes in a high-level description of the optimisation target and automatically generates pGA designs for FPGAs. Our pGA system exploits the two levels of parallelism found in GA instances and genetic operations, allowing users to tailor the architecture for resource constraints at compile-time. The framework also enables users to tune a subset of parameters at run-time without time-consuming recompilation. Our pGA design is more flexible than previous ones, and has an average speedup of 26 times compared to the multi-core counterparts over five combinatorial and numerical optimisation problems. When compared with a GPU, it also shows a 6.8 times speedup over a combinatorial application.
  • Keywords
    field programmable gate arrays; genetic algorithms; mathematics computing; parallel algorithms; FPGA-based parallel genetic algorithm; GA instances; GPU; combinatorial optimisation problem; field programmable gate array; genetic operations; graphics processing unit; high-level optimisation description; numerical optimisation problem; pGA; resource constraints; Biological cells; Electronics packaging; Genetic algorithms; Genetics; Hardware; Kernel;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field Programmable Logic and Applications (FPL), 2014 24th International Conference on
  • Conference_Location
    Munich
  • Type

    conf

  • DOI
    10.1109/FPL.2014.6927501
  • Filename
    6927501