Title :
FPGA in Rough-Granular Computing: Reduct Generation
Author :
Kopczynski, Maciej ; Grzes, Tomasz ; Stepaniuk, Jaroslaw
Author_Institution :
Fac. of Comput. Sci., Bialystok Univ. of Technol., Bialystok, Poland
Abstract :
In this paper we propose a combination of capabilities of the FPGA based device for computing reduct. Presented architecture has been tested on a real-world data. Obtained results confirm the huge acceleration of the computation time using hardware supporting reduct computation in comparison to software implementation.
Keywords :
granular computing; rough set theory; FPGA based device; computation time; real-world data; reduct generation; rough-granular computing; software implementation; Clocks; Digital systems; Field programmable gate arrays; Hardware; Multiplexing; Radiation detectors; Software; FPGA; hardware solution; reduct; rough set;
Conference_Titel :
Web Intelligence (WI) and Intelligent Agent Technologies (IAT), 2014 IEEE/WIC/ACM International Joint Conferences on
Conference_Location :
Warsaw
DOI :
10.1109/WI-IAT.2014.120
