DocumentCode
1243139
Title
Improved switched-current (SI) bilinear integrator circuit
Author
Psychalinos, C. ; Goutis, C.E.
Author_Institution
Dept. of Electr. Eng., Patras Univ., Greece
Volume
31
Issue
1
fYear
1995
fDate
1/5/1995 12:00:00 AM
Firstpage
26
Lastpage
27
Abstract
A bilinear SI integrator circuit with a reduced number of current mirrors is presented. The realisation of the circuit is based on the modification of the corresponding block diagram, to eliminate the required current inversions without delay. The resulting circuit has improved sensitivity performance to current mirror ratio variations
Keywords
circuit diagrams; integrating circuits; switched current circuits; SI circuit; block diagram; current inversions; current mirrors; sensitivity; switched-current bilinear integrator circuit;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19950050
Filename
364320
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