DocumentCode
1243550
Title
A low phase noise C-band frequency synthesizer using a new fractional-N PLL with programmable fractionality
Author
Nakagawa, Tadao ; Tsukahara, Tsuneo
Author_Institution
NTT Wireless Syst. Labs., Kanagawa, Japan
Volume
44
Issue
2
fYear
1996
fDate
2/1/1996 12:00:00 AM
Firstpage
344
Lastpage
346
Abstract
This paper presents a new fractional-N PLL that has an arbitrary denominator of the fractional division ratio as well as an arbitrary numerator and an integer part. This enables a reduction in the phase noise of frequency synthesizers for many applications with various channel-space frequencies. The circuit elements of this fractional-N PLL are fabricated in LSI´s that operate up to 6.5 GHz. They have been successfully installed in a C-band frequency synthesizer with a low phase noise MMIC VCO
Keywords
MMIC; frequency synthesizers; large scale integration; phase locked loops; phase noise; 3.9 to 6.2 GHz; C-band; LSI; MMIC; arbitrary denominator; arbitrary numerator; channel-space frequencies; fractional division ratio; fractional-N PLL; frequency synthesizer; phase noise; programmable fractionality; Counting circuits; Frequency conversion; Frequency synthesizers; Hardware; Latches; MMICs; Microwave frequencies; Phase locked loops; Phase noise; Voltage-controlled oscillators;
fLanguage
English
Journal_Title
Microwave Theory and Techniques, IEEE Transactions on
Publisher
ieee
ISSN
0018-9480
Type
jour
DOI
10.1109/22.481588
Filename
481588
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