DocumentCode :
1244015
Title :
Evaluating FTRE´s for dependability measures in fault tolerant systems
Author :
Rai, Suresh
Author_Institution :
Dept. of Electr. & Comput. Eng., Louisiana State Univ., Baton Rouge, LA, USA
Volume :
44
Issue :
2
fYear :
1995
fDate :
2/1/1995 12:00:00 AM
Firstpage :
275
Lastpage :
285
Abstract :
In order to analyze dependability measures in a fault tolerant system, we generally consider a nonstate space or a state space type model. A fault tree with repeated events (FTRE´s) presents an important strategy for the nonstate space model. The paper deals with a conservative assessment to complex fault tree models, henceforth called CRAFT, to obtain an approximate analysis of the FTRE´s. It is a noncutset, direct, bottom-up approach. It uses failure probability or failure rate as input and determines a bound on the probability of occurrence of the TOP event. CRAFT generalizes the concept of a cutting heuristic that obtains the signal probabilities for testability measurement in logic circuits. The method is efficient and solves coherent and noncoherent FTRE´s having AND, OR, XOR, and NOT gates. In addition, CRAFT considers M/N priority AND, and two types of functional dependency, namely OR and AND types. Examples such as the Cm* architecture and a fault-tolerant software based on recovery block concept are used to illustrate the approach. The paper also provides a comparison with approaches such as SHARPE, HARP, and FTC
Keywords :
fault tolerant computing; fault trees; probability; reliability; software fault tolerance; CRAFT; FTRE; HARP; M/N priority; SHARPE; TOP event; bottom-up approach; complex fault tree models; conservative assessment; cutting heuristic; dependability measures; failure probability; failure rate; fault tolerant systems; fault tree with repeated events; fault-tolerant software; logic circuits; nonstate space; recovery block concept; signal probabilities; state space type model; testability measurement; Circuit testing; Computer architecture; Extraterrestrial measurements; Fault tolerance; Fault tolerant systems; Fault trees; Logic circuits; Logic testing; State-space methods; Stochastic processes;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/12.364538
Filename :
364538
Link To Document :
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