A deep submicrometer CMOS process compatible high-Q air-gap solenoid inductor with laterally laid structure

Author

Lin, C.S. ; Fang, Y.K. ; Chen, S.F. ; Lin, C.Y. ; Hsieh, M.C. ; Lai, C.M. ; Chou, T.H. ; Chen, C.H.

Author_Institution

Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan

Volume

26

Issue

3

fYear

2005

fDate

3/1/2005 12:00:00 AM

Firstpage

160

Lastpage

162

Abstract

A high-quality (Q) on-chip solenoid inductor has been fabricated by 0.18 mm CMOS technology with air-gap structure. The solenoid structure with laterally laid out structure saves the chip area significantly and the air-gap suppresses the parasitic capacitances to obtain high-Q value. Additionally, with software ANSYS simulation, the solenoid inductor also possesses a higher strength for impact (80 000 times) in comparison to a spiral inductor. The measured peak-Q and peak-Q frequency with an air-gap are 8.8 and 1.7 GHz, respectively, which present almost 9% improvements in the magnitude and 54% in the peak-Q frequency in comparison to the conventional solenoid inductor at 8.1 and 1.1 GHz.

Keywords

CMOS integrated circuits; air gaps; circuit simulation; inductors; semiconductor process modelling; solenoids; system-on-chip; ANSYS simulation; deep submicrometer CMOS process compatible high-Q air-gap solenoid inductor; laterally laid structure; on-chip solenoid inductor; parasitic capacitances; spiral inductor; Air gaps; CMOS process; CMOS technology; Frequency measurement; Inductors; Parasitic capacitance; Radio frequency; Silicon; Solenoids; Spirals; Air-gap; falling altitude; inductors; quality factor; solenoid;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2005.843213

Filename

1397846