Title :
A novel fully CMOS process compatible PREM for SOC applications
Author :
Yeh, C.C. ; Wang, Tahui ; Tsai, W.J. ; Lu, T.C. ; Liao, Y.Y. ; Zous, N.K. ; Chin, C.Y. ; Chen, Y.R. ; Chen, M.S. ; Ting, WenChi ; Chih-Yuan Lu
Author_Institution :
Macronix Int. Co. Ltd., Hsinchu, Taiwan
fDate :
3/1/2005 12:00:00 AM
Abstract :
A novel nonvolatile memory cell named programmable resistor with eraseless memory (PREM) is proposed for system on chip applications for the first time. PREM combines a novel "eraseless" algorithm and the progressive breakdown of an ultrathin oxide. No or one extra mask is needed with a standard CMOS process. Multitime programming, multilevel cell, nonvolatility, and low-voltage operation are realized. Good reliability is demonstrated based on the result of a single cell.
Keywords :
CMOS memory circuits; integrated circuit reliability; resistors; system-on-chip; CMOS process compatible PREM; SOC application; eraseless algorithm; low-voltage operation; multilevel cell; multitime programming; nonvolatile memory cell; programmable resistor with eraseless memory; progressive ultrathin oxide breakdown; reliability; standard CMOS process; system on chip; Breakdown voltage; CMOS process; Diodes; Electric breakdown; Leakage current; Nonvolatile memory; Resistors; Stress control; System-on-a-chip; Voltage control; Eraseless; multilevel cell (MLC); multitime programming (MTP); nonvolatile; programmable resistor with eraseless memory (PREM); progressive breakdown; system on chip (SOC);
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2005.843221