DocumentCode
1245666
Title
Parallel algorithms and VLSI architectures for stack filtering using Fibonacci p-codes
Author
Gevorkian, David Z. ; Egiazarian, Karen O. ; Agaian, Sos S. ; Astola, Jaakko T. ; Vainio, Olli
Author_Institution
Inst. for Problems of Inf. & Autom., Acad. of Sci., Yerevan, Armenia
Volume
43
Issue
1
fYear
1995
fDate
1/1/1995 12:00:00 AM
Firstpage
286
Lastpage
295
Abstract
A parallel decompositional algorithm and VLSI architecture is proposed for computation of the output of a stack filter over a single window of input samples using Fibonacci p-codes. For a subclass of positive Boolean functions, a more efficient parallel algorithm and VLSI architecture for running stack filtering is also presented. The area-time complexities of the proposed designs are estimated
Keywords
Boolean functions; VLSI; computational complexity; digital filters; nonlinear filters; parallel algorithms; parallel architectures; Fibonacci p-codes; VLSI architectures; area-time complexities; input samples; output; parallel decompositional algorithm; positive Boolean functions; stack filtering; Adaptive filters; Computer architecture; Concurrent computing; Digital filters; Filtering; Nonlinear filters; Parallel algorithms; Signal processing algorithms; Statistics; Very large scale integration;
fLanguage
English
Journal_Title
Signal Processing, IEEE Transactions on
Publisher
ieee
ISSN
1053-587X
Type
jour
DOI
10.1109/78.365308
Filename
365308
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