A half-pel precision MPEG2 motion-estimation processor with concurrent three-vector search

Author

Ishihara, Kazuya ; Masuda, Shinichi ; Hattori, Shinichi ; Nishikawa, Hirofumi ; Ajioka, Yoshihide ; Yamada, Tsuyoshi ; Amishiro, Hiroyuki ; Uramoto, Shin-ichi ; Yoshimoto, Masahiko ; Sumi, Tadashi

Author_Institution

Syst. LSI Lab., Mitsubishi Electr. Corp., Itami, Japan

Volume

30

Issue

12

fYear

1995

fDate

12/1/1995 12:00:00 AM

Firstpage

1502

Lastpage

1509

Abstract

A half-pel precision MPEG2 motion estimation processor using a 0.5 μm CMOS technology supports all prediction modes in MPEG2 including frame, field and dual-prime prediction, and estimates three vectors concurrently. The multiple processor configuration allows a search range expansion by ±127.5, keeping bus traffic constant. It integrates 850 K transistors in a 13.85 mm×13.55 mm silicon die. The observed maximum operating frequency is 75 MHz. At 40 MHz for NTSC, the peak computational power is 20 GOPS and the power dissipation is 1.9 W

Keywords

CMOS digital integrated circuits; VLSI; data compression; digital signal processing chips; image matching; motion estimation; systolic arrays; video coding; 0.5 micron; 1.9 W; 40 MHz; 75 MHz; CMOS technology; DSP chip; MPEG2 motion estimation processor; block matching; concurrent three-vector search; dual-prime prediction; field prediction; frame prediction; half-pel precision; CMOS technology; Discrete cosine transforms; Laboratories; Large scale integration; Motion estimation; Road transportation; Silicon; Systolic arrays; Transform coding; Video compression;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.482198

Filename

482198