• DocumentCode
    1246986
  • Title

    Circuit modeling in high-speed designs

  • Author

    Sharawi, Mohammad S. ; Aloi, Daniel N.

  • Volume
    24
  • Issue
    1
  • fYear
    2005
  • Firstpage
    17
  • Lastpage
    20
  • Abstract
    This work presents the design and modeling of highspeed circuits. Modeling of high-speed circuits is usually divided into physical and behavioral representations. Physical modeling is the actual transistor level design of the high-speed chip or circuit for inter-chip communications and system level simulations. Behavioral modeling imitates the behavior of the circuit when various input/output conditions are encountered. Behavioral modeling is much faster than transistor level modeling because it does not include all the tiny details of transistors. Rather it focuses on the behavior of the circuit. But more accurate results are obtained from physical modeling because it does include all the tiny details that govern the model functionality. Physical modeling using SPICE gives accurate real life operation but requires a long simulation time. While behavioral modeling using input/output buffer information specification takes less simulation time. ASIC designers are using VHDL/Verilog to perform and test chip design on an FPGA for high volume production.
  • Keywords
    SPICE; field programmable gate arrays; hardware description languages; high-speed integrated circuits; integrated circuit design; integrated circuit modelling; integrated circuit testing; semiconductor device models; semiconductor process modelling; system-on-chip; transistors; ASIC design; FPGA; SPICE; VHDL; Verilog; behavioral modeling; chip design test; circuit modeling; high-speed circuit design; input/output buffer information specification; inter-chip communication; physical modeling; simulation time; system level simulation; transistor level chip design; Circuit simulation; Computational modeling; Computer simulation; Driver circuits; Hardware design languages; Pins; SPICE; Semiconductor device modeling; Signal analysis; Voltage;
  • fLanguage
    English
  • Journal_Title
    Potentials, IEEE
  • Publisher
    ieee
  • ISSN
    0278-6648
  • Type

    jour

  • DOI
    10.1109/MP.2005.1368912
  • Filename
    1405796