DocumentCode
1247235
Title
Carbon-nanotube-based voltage-mode multiple-valued logic design
Author
Raychowdhury, Arijit ; Roy, Kaushik
Author_Institution
Dept. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
Volume
4
Issue
2
fYear
2005
fDate
3/1/2005 12:00:00 AM
Firstpage
168
Lastpage
179
Abstract
Multivalued logic has always attracted the attention of digital system and logic designers. However, the high-performance and low-power CMOS process, which has been developed over the last two decades, has traditionally assisted successful circuit implementation of binary logic. Consequently, in spite of its large potential multivalued logic design is seldom a circuit designer´s choice. This paper presents a novel method of multiple-valued logic design using carbon-nanotube field-effect transistors (CNFETs). The geometry-dependent threshold voltage of CNFETs has been effectively used to design a ternary logic family. We have developed a SPICE-compatible model of ballistic CNFETs that can account for varying geometries and operating conditions. SPICE simulations have been performed on the proposed logic gates, and the transfer characteristics as well as transient behavior have been extensively studied. Finally, a comparison in terms of power and performance of the ternary logic family vis-a`-vis traditional complementary field-effect transistor binary logic family has been presented.
Keywords
CMOS logic circuits; SPICE; carbon nanotubes; field effect transistors; logic design; logic gates; low-power electronics; multivalued logic; multivalued logic circuits; nanotube devices; semiconductor device models; transient analysis; C; FET; SPICE simulations; binary logic circuit implementation; carbon nanotube field effect transistors; complementary field-effect transistor; digital system; geometry dependent threshold voltage; logic gates; low-power CMOS process; transfer properties; voltage mode multiple valued logic design; CMOS logic circuits; CMOS process; CNTFETs; Carbon nanotubes; Digital systems; Geometry; Logic design; Multivalued logic; Solid modeling; Threshold voltage;
fLanguage
English
Journal_Title
Nanotechnology, IEEE Transactions on
Publisher
ieee
ISSN
1536-125X
Type
jour
DOI
10.1109/TNANO.2004.842068
Filename
1405993
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