Optimal PWM design for high power three-level inverter through comparative studies

Author

Liu, Hyo L. ; Cho, Gyu H. ; Park, Sun S.

Author_Institution

Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Taejon, South Korea

Volume

10

Issue

1

fYear

1995

fDate

1/1/1995 12:00:00 AM

Firstpage

38

Lastpage

47

Abstract

Comparative studies between harmonic elimination and optimal PWM strategies are given for high power three-level inverter feeding an induction motor. An effective PWM map construction method based on the valid region on the frequency modulation index plane is suggested. Thereby, an optimal map including asynchronous space vector PWM, harmonic elimination and optimal PWM method is generated covering all of the low, middle and high modulation index regions. The PWM map was designed for 1 MVA rated general purpose GTO inverter and implemented with a digital signal processor. Experimental results are presented for 10 kVA prototype

Keywords

PWM invertors; circuit optimisation; circuit testing; digital signal processing chips; frequency modulation; induction motors; power system harmonics; switching circuits; thyristor convertors; 1 MVA; 10 kVA; GTO inverter; PWM map construction method; asynchronous space vector PWM; digital signal processor; frequency modulation index plane; harmonic elimination; induction motor; modulation index regions; optimal PWM design; three-level inverter; valid region; Digital signal processors; Frequency modulation; Induction generators; Induction motors; Modular construction; Power system harmonics; Pulse width modulation; Pulse width modulation inverters; Signal design; Space vector pulse width modulation;

fLanguage

English

Journal_Title

Power Electronics, IEEE Transactions on

Publisher

ieee

ISSN

0885-8993

Type

jour

DOI

10.1109/63.368462

Filename

368462