An accurate analysis of slew rate for two-stage CMOS opamps

Author

Yavari, Mohammad ; Maghari, Nima ; Shoaei, Omid

Author_Institution

Electr. & Comput. Eng. Dept., Univ. of Tehran, Iran

Volume

52

Issue

3

fYear

2005

fDate

3/1/2005 12:00:00 AM

Firstpage

164

Lastpage

167

Abstract

This brief presents a time-domain model for the slew rate of CMOS two-stage Miller compensated operational transconductance amplifiers. The effects of both the first- and second-stage currents are considered in this model and a simple analytical expression is given in terms of the compensation and load capacitors, output voltage change, and device sizes. HSPICE simulation results are provided to show the validity of the proposed model using a 0.25-μm CMOS technology.

Keywords

CMOS integrated circuits; SPICE; operational amplifiers; 0.25 micron; HSPICE simulation; linear settling; operational transconductance amplifiers; slew rate analysis; switched-capacitor circuits; time-domain model; two-stage CMOS opamps; two-stage Miller compensated OTA; CMOS technology; Circuit simulation; MOS devices; Operational amplifiers; Predictive models; Semiconductor device modeling; Switched capacitor circuits; Time domain analysis; Transconductance; Voltage; Linear settling; operational transconductance amplifiers (OTAs); slew rate; switched-capacitor circuits;

fLanguage

English

Journal_Title

Circuits and Systems II: Express Briefs, IEEE Transactions on

Publisher

ieee

ISSN

1549-7747

Type

jour

DOI

10.1109/TCSII.2004.842058

Filename

1406209