DocumentCode
1248194
Title
Accurate Array-Based Measurement for Subthreshold-Current of MOS Transistors
Author
Sato, Takashi ; Ueyama, Hiroyuki ; Nakayama, Noriaki ; Masu, Kazuya
Author_Institution
Grad. Sch. of Inf., Kyoto Univ., Kyoto, Japan
Volume
44
Issue
11
fYear
2009
Firstpage
2977
Lastpage
2986
Abstract
A MOS transistor-array structure for accurate subthreshold current characterization is presented. Two architectural improvements called LCS and PES, and measured data treatment called MCC are utilized. The LCS, leakage current cut-off switch, reduces unwanted leakage current of the non-target devices which masks the target leakage current. The PES, potential equalizing supply, further reduces the masking current by setting source and drain terminals of the LCS equal. The MCC, masking current cancellation, improves measurement accuracy by subtracting remaining masking current. The proposed circuit structure and the procedure virtually eliminate usual constraint on the number of transistors that can be present in an array. The array structure also offers greater flexibility in choosing a row-column aspect ratio and allows different types of MOS transistors to be interweaved. Experimental array design consisting of 1023 low threshold voltage devices demonstrated accurate measurement of subthreshold leakage current with precision of a few picoamperes.
Keywords
MOSFET; electric current measurement; leakage currents; MOS transistors; leakage current cut-off switch; masking current; potential equalizing supply; subthreshold-current measurement; Circuit optimization; Circuit testing; Current measurement; Large scale integration; Leakage current; MOSFETs; Random access memory; Subthreshold current; Switches; Threshold voltage; Device characterization; subthresold current measurement; transistor array;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.2009.2028944
Filename
5308581
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