DocumentCode :
1248848
Title :
Subthreshold Characteristics of MOS Transistors With 
Stacked Gate Dielectric
Author :
Wong, Hei ; Yang, B.L. ; Kakushima, K. ; Iwai, Hiroshi
Author_Institution :
Dept. of Electron. Eng., City Univ. of Hong Kong, Kowloon, China
Volume :
32
Issue :
8
fYear :
2011
Firstpage :
1002
Lastpage :
1004
Abstract :
This letter reports the subthreshold characteristics of MOS transistors with the novel CeO2/La2O3 stacked gate dielectric. We found that the top CeO2 capping layer does not only improve the bulk properties of La2O3 by reducing the oxygen vacancies as a result of the reduction reaction of CeO2 but also reduces the La2O3/Si interface trap pronouncedly. We further identify the energy level of the interface traps by conducting temperature-dependent subthreshold slope measurements.
Keywords :
MOSFET; cerium compounds; lanthanum compounds; CeO2-La2O3; La2O3-Si; MOS transistors; energy level; interface trap; oxygen reduction; oxygen vacancies reduction; stacked gate dielectric; subthreshold characteristics; temperature-dependent subthreshold slope measurements; Capacitance; Dielectrics; Logic gates; MOSFETs; Silicon; Temperature distribution; $hbox{La}_{2}hbox{O}_{3}$ $k$
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2011.2157799
Filename :
5898389
Link To Document :
