A 60 GHz Tunable Output Profile Power Amplifier in 65 nm CMOS

Author

Liu, Jenny Yi-Chun ; Gu, Qun Jane ; Tang, Adrian ; Wang, Ning-Yi ; Chang, Mau-Chung Frank

Author_Institution

Dept. of Electr. Eng., Univ. of California, Los Angeles, CA, USA

Volume

21

Issue

7

fYear

2011

fDate

7/1/2011 12:00:00 AM

Firstpage

377

Lastpage

379

Abstract

A fully integrated three-stage 60 GHz power amplifier with amplitude/phase compensation is realized in 65 nm CMOS. An adaptive feedback bias scheme with three control knobs is proposed to extend the linear operating region. At a supply voltage of 1 V, the fully differential amplifier achieves a linear gain of 15 dB and occupies a compact area of 0.056 mm². It achieves a minimal P_sat-P_1dB separation of 0.6 dB by extending the P_1dB by 8.5 dB. To our best knowledge, this is the smallest P_sat-P_1dB separation reported to date. With on-chip phase compensation, the output phase variation is reduced by 57%.

Keywords

CMOS analogue integrated circuits; compensation; differential amplifiers; feedback; millimetre wave devices; power amplifiers; CMOS; adaptive feedback bias scheme; amplitude compensation; differential amplifier; frequency 60 GHz; integrated three stage power amplifier; linear operating region; on chip phase compensation; output phase variation; size 65 nm; tunable output profile power amplifier; CMOS integrated circuits; Capacitance; Circuit faults; Gain; Logic gates; Power generation; System-on-a-chip; CMOS; millimeter wave; power amplifier (PA); transformers;

fLanguage

English

Journal_Title

Microwave and Wireless Components Letters, IEEE

Publisher

ieee

ISSN

1531-1309

Type

jour

DOI

10.1109/LMWC.2011.2152386

Filename

5898436