Title :
Wired-OR property and improved structure of recovered energy logic (REL)
Author :
Chulwoo Kim ; Soowon Kim
Author_Institution :
Dept. of Electron. Eng., Korea Univ., Seoul
fDate :
4/24/1997 12:00:00 AM
Abstract :
A modified MOS REL structure is proposed, which exhibits the wired-OR property and enhances speed and power characteristics. Proposed MOS REL gates have been fabricated and tested. It is shown that the power X delay product of an MOS REL inverter is enhanced by 26% with a smaller silicon area
Keywords :
MOS logic circuits; adders; logic design; logic gates; MOS REL gates; REL inverter; modified MOS REL structure; power characteristics enhancement; recovered energy logic; speed characteristics enhancement; wired-OR property;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19970500
