• DocumentCode
    1250027
  • Title

    Very high radix square root with prescaling and rounding and a combined division/square root unit

  • Author

    Lang, Tomés ; Montuschi, Paolo

  • Author_Institution
    Dept. of Electr. & Comput. Eng., California Univ., Irvine, CA, USA
  • Volume
    48
  • Issue
    8
  • fYear
    1999
  • fDate
    8/1/1999 12:00:00 AM
  • Firstpage
    827
  • Lastpage
    841
  • Abstract
    An algorithm for square root with prescaling and selection by rounding is developed and combined with a similar scheme for division. Since division is usually more frequent than square root, the main concern of the combined implementation is to maintain the low execution time of division, while accepting a somewhat larger execution time for square root. The algorithm is presented in detail, including the mathematical development of bounds for the first square-root digit and for the scaling factor. The proposed implementation is described, evaluated and compared with other combined div/sqrt units. The comparisons show that the proposed scheme potentially produces a significant speed-up for division, whereas, for square root, the speed-up is small
  • Keywords
    digital arithmetic; dividing circuits; logic design; combined division/square root unit; prescaling; rounding; square-root digit; very high radix square root; Computer Society; Convergence; Delay effects; Performance evaluation; Proposals;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/12.795124
  • Filename
    795124