DocumentCode
1250922
Title
Use of current sensing technique in designing asynchronous static RAM for self-timed systems
Author
Choy, Chiu Sing ; Chan, Cheung Fat
Volume
33
Issue
8
fYear
1997
fDate
4/10/1997 12:00:00 AM
Firstpage
667
Lastpage
668
Abstract
The conventional static RAM was modified so that it can communicate with other self-timed systems. The four-phase handshake control protocol was used and the current-sensing completion detection (CSCD) technique was studied for the read completion signal generation. The authors present the implementation and simulation results of a test circuit
Keywords
SRAM chips; asynchronous circuits; memory protocols; asynchronous static RAM design; circuit simulation; current-sensing completion detection; four-phase handshake control protocol; read completion signal generation; self-timed system;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19970467
Filename
590982
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